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Code No. Project Title Base Paper Payment Video
VL01 Capacitive Modeling of Cylindrical Surrounding Double-Gate MOSFETs for Hybrid RF Applications(IEEE 2021) Download Buy
VL02 Dielectric-Modulated Bulk-Planar Junctionless Field-Effect Transistor for Biosensing Applications(IEEE 2021) Download Buy
VL03 Fast and Accurate Estimation of Statistical Eye Diagram for Nonlinear High-Speed Links(IEEE 2021) Download Buy
VL04 Cost-Effective Test Screening Method on 40-nm Embedded SRAMs for Low-Power MCUs(IEEE 2021) Download Buy
VL05 Reusable Delay Path Synthesis for Lightening Asynchronous Pipeline Controller(IEEE 2021) Download Buy
VL06 Functional Constraints in the Selection of Two-Cycle Gate-Exhaustive Faults for Test Generation(IEEE 2021) Download Buy
VL07 An Efficient Parallel Processor for Dense Tensor Computation(IEEE 2021) Download Buy
VL08 A 13-bit 312.5-MS/s Pipelined SAR ADC With Open-Loop Integrator-Based Residue Amplifier and Gain-Stabilized Integration Time Generation(IEEE 2021) Download Buy
VL09 PhaseCamouflage: Leveraging Adiabatic Operation to Thwart Reverse Engineering(IEEE 2021) Download Buy
VL10 Cryptographic Accelerators for Digital Signature Based on Ed25519(IEEE 2021) Download Buy
VL11 A Three-Stage Comparator and Its Modified Version With Fast Speed and Low Kickback(IEEE 2021) Download Buy
VL12 A 120–150 GHz Power Amplifier in 28-nm CMOS Achieving 21.9-dB Gain and 11.8-dBm Psat for Sub-THz Imaging System(IEEE 2021) Download Buy
VL13 A Bidirectional Nonlinearly Coupled QVCO With Passive Phase Interpolation for Multiphase Signals Generation(IEEE 2021) Download Buy
VL14 ASSURE: RTL Locking Against an Untrusted Foundry(IEEE 2021) Download Buy
VL15 Architectural Exploration for Energy-Efficient Fixed-Point Kalman Filter VLSI Design(IEEE 2021) Download Buy
VL16 Droplet Transportation in MEDA-Based Biochips: An Enhanced Technique for Intelligent Cross-Contamination Avoidance(IEEE 2021) Download Buy
VL17 Parallel and Flexible 5G LDPC Decoder Architecture Targeting FPGA(IEEE 2021) Download Buy
VL18 High-Performance Logic-on-Memory Monolithic 3-D IC Designs for Arm Cortex-A Processors(IEEE 2021) Download Buy
VL19 DOVA PRO: A Dynamic Overwriting Voltage Adjustment Technique for STT-MRAM L1 Cache Considering Dielectric Breakdown Effect(IEEE 2021) Download Buy
VL20 An Ultralow-Power OOK/BFSK/DBPSK Wake-Up Receiver Based on Injection-Locked Oscillator(IEEE 2021) Download Buy
VL21 Development of a Photoelectric Adjustment System With Extended Range for Fluorescence Immunochromatographic Assay Strip Readers(IEEE 2021) Download Buy
VL22 AI-Powered Terahertz VLSI Testing Technology for Ensuring Hardware Security and Reliability(IEEE 2021) Download Buy
VL23 A Generalized Power Supply Induced Jitter Model Based on Power Supply Rejection Ratio Response(IEEE 2021) Download Buy
VL24 Enabling Write-Reduction Multiversion Scheme With Efficient Dual-Range Query Over NVRAM(IEEE 2021) Download Buy
VL25 Converter-Free Power Delivery Using Voltage Stacking for Near/Subthreshold Operation(IEEE 2021) Download Buy
VL26 An Efficient VLSI Architecture for FastICA by Using the Algebraic Jacobi Method for EVD(IEEE 2021) Download Buy
VL27 A 3-Phase Resonant Switched-Capacitor Converter for Data Center 48-V Rack Power Distribution(IEEE 2021) Download Buy
VL28 On the Design of a Fault-Tolerant Scalable Three Dimensional NoC-Based Digital Neuromorphic System With On-Chip Learning(IEEE 2021) Download Buy
VL29 Splitter Trees in Single Flux Quantum Circuits(IEEE 2021) Download Buy
VL30 Analytical Modeling of Jitter in Bang-Bang CDR Circuits Featuring Phase Interpolation(IEEE 2021) Download Buy
VL31 ARXON: A Framework for Approximate Communication Over Photonic Networks-on-Chip(IEEE 2021) Download Buy
VL32 A 32-Gb/s PAM-4 SST Transmitter With Four-Tap FFE Using High-Impedance Driver in 28-nm FDSOI(IEEE 2021) Download Buy
VL33 Design of FPGA-Implemented Reed–Solomon Erasure Code (RS-EC) Decoders With Fault Detection and Location on User Memory(IEEE 2021) Download Buy
VL34 An Efficient 3D ReRAM Convolution Processor Design for Binarized Weight Networks(IEEE 2021) Download Buy
VL35 A 64.1mW Accurate Real-Time Visual Object Tracking Processor With Spatial Early Stopping on Siamese Network(IEEE 2021) Download Buy
VL36 A 43.1TOPS/W Energy-Efficient Absolute-Difference-Accumulation Operation Computing-In-Memory With Computation Reuse(IEEE 2021) Download Buy
VL37 Low power 4×4 bit multiplier design using dadda Algorithm and optimized full adder (IEEE 2019) Download Buy
VL38 Dlau: a scalable deep learning accelerator unit On fpga (IEEE 2019) Download Buy
VL39 Design of low-power high-performance 2–4 and 4–16 mixed-logic line decoders IEEE 2019) Download Buy
VL40 Design and implementation of 32-bits mips Processor to perform qrd based on fpga (IEEE 2019) Download Buy
VL41 True Single-Phase Adiabatic Circuitry(IEEE 2019) Download Buy
VL42 A Modified Partial Product Generator for Redundant Binary Multipliers IEEE 2019) Download Buy
VL43 A Deep Reinforcement Learning Network for Traffic Light Cycle Control (IEEE 2019) Download Buy
VL44 Design and Analysis of Carry Look Ahead Adder Using CMOS Technique (IEEE 2019) Download Buy
VL45 Design and Analysis of Carry Look Ahead Adder Using CMOS Technique (IEEE 2019) Download Buy
VL46 Low-Power, High-Sensitivity Readout Integrated Circuit With Clock-Gating (IEEE 2019) Download Buy
VL47 Supply Voltage Dependency on the Single Event(IEEE 2019) Download Buy
VL48 High Speed Low Power Flash ADC Design for Ultra Wide Band Applications(IEEE 2019) Download Buy
VL49 A Novel 8T Cell-Based Subthreshold Static RAM for Ultra-Low Power Platform Applications (IEEE 2019) Download Buy
VL50 Ultra-Low Power Platform Applications (IEEE 2019) Download Buy
VL51 "Material analysis of high degree of variability in thin CMOS for SRAM current sense amplifier" (IEEE 2019) Download Buy
VL52 "Column-Selection-Enabled 10T SRAM Utilizing Shared Diff-VDD Write and Dropped-VDD Read for Power Reduction" (IEEE 2019) Download Buy
VL53 Low Power BIST based Multiplier Design and Simulation using FPGA (IEEE 2019) Download Buy
VL54 Optimizing the Implementation of SEC–DAEC Codes in FPGAs (IEEE 2019) Download Buy
VL55 A Low Latency and Resource Efficeient Enable RSA Cryptoprocessor Architecture (IEEE 2019) Download Buy
VL56 Design and Analysis of Digital Counters for VLSI Applications (IEEE 2019) Download Buy
VL57 VLSI Implementation of Turbo Coder for LTE using Verilog HDL (IEEE 2019) Download Buy
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